Interpret and implement Moore’s Law to include all aspects of heterogeneous systems and develop architectures, methodologies, designs, components, materials and manufacturable integration schemes, that will shrink system footprint and improve power and performance.
At TSMC’s North American Technology Symposium on Wednesday, the company detailed both its semiconductor technology and chip-packaging technology road maps. While the former is key to keeping the traditional part of Moore’s Law going, the latter could accelerate a trend toward processors made from more and more silicon, leading quickly...
The U.S. Department of Commerce issued a Notice of Funding Opportunity (NOFO) to seek applications for research and development (R&D) activities that will establish and accelerate domestic capacity for advanced packaging substrates and substrate materials, a key technology for manufacturing semiconductors.
Subramanian S. Iyer has joined CHIPS for America’s Research and Development (R&D) Office as the director of the National Advanced Packaging Manufacturing Program (NAPMP).
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